The nine stages of a Rogers board build, from laminate cleaning to vacuum packing, with the control point at each stage that protects high-frequency performance.
The manufacturing route for a Rogers board looks much like the route for an ordinary FR-4 board: image, etch, drill, plate, laminate, finish, cut, test. What changes is the tolerance on every one of those steps. Rogers materials are chosen for electrical behaviour that FR-4 cannot provide, and that behaviour is easily lost by a process that is run to FR-4 habits. The sequence below is the standard workflow, with the control points that matter for high-frequency performance noted at each stage.
It is worth reading alongside the material-specific detail in this article on the production process for 5880 boards, because the steps are common but the parameters are not.
| Step | What Happens | Control Point for High Frequency |
|---|---|---|
| Material preparation | Grade selected and the copper-clad laminate cleaned | Remove oxidation without roughening the low-profile copper |
| Image transfer | Photoresist applied, exposed through a mask and developed | Line width and spacing accuracy, because impedance follows geometry |
| Etching | Unprotected copper removed by chemical etchant | Undercut control, so the trace cross-section stays rectangular |
| Drilling and plating | Vias and mounting holes drilled, then copper deposited in the holes | Clean hole walls and uniform plating, especially on soft PTFE grades |
| Lamination and alignment | Layers stacked in order and bonded under heat and pressure | Layer registration and dielectric thickness consistency |
| Surface treatment | Finish applied to exposed copper for protection and solderability | Finish choice, because it contributes to insertion loss |
| Cutting and shaping | Panels separated and outlines trimmed to specification | Edge quality, as damage can propagate during assembly |
| Testing and quality control | Electrical, impedance and visual checks | Impedance verification on controlled lines before shipment |
| Packaging and delivery | Boards cleaned, vacuum sealed and shipped with test reports | Moisture protection for panels that will be stored before assembly |
The build starts with the choice of grade. RO4003C, RO4350B or RT5880 are the common starting points, supplied as copper-clad laminates, and the selection follows the frequency plan and the loss budget rather than availability.
Cleaning comes next. Any impurity or oxidation left on the copper interferes with adhesion at the imaging stage, so the laminate is cleaned to a surface that will accept photoresist reliably. On a high-frequency material this step carries an extra condition: the cleaning must not roughen the copper, because a rough surface adds skin-effect loss that the laminate was selected to avoid.
A photosensitive layer is applied to the copper surface, exposed to ultraviolet light through the circuit pattern mask, then developed so that the unexposed resist washes away and leaves bare copper where the circuit will remain. The accuracy of this step sets the accuracy of everything downstream, because impedance is a function of line width and spacing. On high-frequency work the exposure tooling and the resist process are chosen for dimensional repeatability rather than for throughput.
Chemical etching removes the copper that the resist no longer protects, leaving the circuit pattern in place. Ferric chloride and nitric acid based etchants are both used depending on the process line. The parameter that decides quality here is lateral corrosion, or undercut: an over-etched trace has a trapezoidal cross-section and an effective width narrower than the design called for, which shifts the impedance.
After etching the board is cleaned and inspected for pattern clarity and defects before it moves to the next stage, because a fault found now costs a fraction of what the same fault costs after lamination.
High-precision drilling machines create vias, mounting holes and any other openings the design requires. On soft high-frequency materials the drilling parameters matter more than on FR-4: PTFE smears and fuzzes easily, so feed and retract speeds, drill sharpness and the entry and backup materials all affect the hole wall that the next stage has to plate. The additional steps that PTFE in particular demands are described in these notes on the manufacturing process for Rogers 5880 boards.
Plating then deposits copper inside the holes to create conductive paths between layers. On a multilayer board this is the step that turns a stack of patterned cores into a working circuit, and uniform wall thickness without voids is the acceptance criterion.
Multilayer boards are stacked in the designed order and bonded under heat and pressure. The registration between layers is what keeps a via connected to the pad it is supposed to reach, and on a high-frequency board misregistration also changes the geometry of the transmission line, which shows up as an impedance shift rather than as an obvious open circuit.
Alignment is normally achieved with tooling pins or an optical system, and the stack-up itself is calculated in advance so the finished dielectric thickness lands on target. The wider process is covered in this guide to multilayer high-frequency PCB manufacturing.
Exposed copper is finished to protect it from oxidation and to make it solderable. Gold or tin plating is common, and the process may be ENIG, HASL or a lead-free solder coating depending on the application and the assembly method.
The choice is not only about protection. At high frequency the current travels on the surface, so the conductivity and smoothness of the finish contribute directly to insertion loss. A flat finish such as ENIG generally behaves better electrically than a levelled solder coating, at a higher process cost. The trade-offs between options are compared in this article on ENIG against silver and tin finishes.
The finished panel is cut into individual boards, and outlines are trimmed or additional holes drilled to meet the mechanical drawing. The aim at this stage is dimensional accuracy rather than electrical performance, but edge damage caused by blunt tooling on a brittle or abrasive laminate can become a crack initiation point later, so the cutting method is matched to the material.
Electrical testing checks continuity, shorts and impedance against the specification. Where controlled impedance lines are present, coupons or the boards themselves are measured rather than assumed, because a design that simulates correctly can still be built outside tolerance.
Visual inspection covers the mechanical defects: bubbles, delamination and other damage that electrical test will not detect. Which inspections are carried out, and at what point in the flow, is the subject of this guide to inspection types in high-frequency PCB production.
Boards are cleaned, vacuum sealed and shipped with their test reports. The vacuum seal is not a formality on a high-frequency laminate: moisture absorbed in storage changes dielectric behaviour and can cause blistering at the customer’s reflow stage, so the packaging is part of the electrical specification rather than the logistics.
The steps are the same; the operating windows are tighter. Drilling parameters are narrower because the materials are softer or more abrasive than glass-reinforced epoxy. Hole wall preparation is more demanding because PTFE is chemically inert and will not accept electroless copper without activation. Lamination profiles are developed per material rather than per class. Impedance tolerance is treated as a production measurement rather than a design assumption.
The cumulative effect is that a Rogers build rewards a fabricator who treats each material separately. Where the process is run with the same parameters used for standard boards, the result is usually a board that passes electrical test and misses its impedance target, which is the failure mode this guide on production considerations for microwave PCBs sets out to prevent.
Frequently Asked Questions
The steps are the same but the tolerances are tighter. Drilling parameters narrow because the materials are softer or more abrasive, hole wall activation is mandatory on PTFE, lamination profiles are developed per material, and impedance is measured in production rather than assumed from the design.
Because it changes the trace cross-section. Lateral corrosion during etching narrows the effective line width, and on a controlled impedance line that shifts the impedance away from its target, which shows up as reflection rather than as a visible fault.
Yes. High-frequency current travels near the surface, so the conductivity and smoothness of the finish contribute to insertion loss. A flat finish such as ENIG usually behaves better electrically than a levelled solder coating.
Because absorbed moisture changes dielectric behaviour and turns to steam during the customer's reflow process, causing blisters or delamination. Sealing protects the electrical specification as much as the physical board.
Electrical continuity and isolation, impedance on controlled lines, and a visual check for bubbles or delamination. Impedance is the one most often skipped and the one most likely to explain a board that passes test and fails in the system.
Send us your stack-up, material grades and impedance targets and we will confirm the process window each stage needs before the panels are cut.
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