Via families, parasitic behavior at RF, stub management with back-drilling, and the manufacturing rules — aspect ratio, filling, via-in-pad — that keep multilayer boards buildable.
Vias look like the simplest feature on a multilayer board — a drilled hole, plated with copper — yet at high frequencies they are the component most likely to quietly ruin an otherwise careful design. A via is a transmission-line discontinuity with parasitic inductance and capacitance, a stub that resonates, and a manufacturing tolerance all at once. This guide treats vias the way an RF engineer needs to: as electrical components first and mechanical features second.
Through-hole vias drill through every layer and are the default for low-density work; blind vias connect an outer layer to inner layers; buried vias live entirely between inner layers; and microvias, laser-drilled below 150 microns, carry HDI designs. The selection logic is laid out in our blind and buried via design guide, but the RF summary is simple: the less unused barrel a signal carries, the cleaner the transition. A through-hole via on a twelve-layer board leaves ten layers of stub hanging on a 28 GHz line, which is why high-frequency designs either layer-manage the signal or pay for back-drilling. Layer-count decisions interact directly with via strategy, as covered in the multi-layer layer count design principles.
Three parasitic effects dominate. Barrel inductance adds series impedance that rises with frequency; pad capacitance to surrounding copper creates a low-pass shelf; and the stub acts as a resonant quarter-wave trap that can notch the response entirely at mmWave frequencies. These effects are calculable, and any controlled-impedance workflow built on the controlled impedance design rules should include via models, not just trace models. At 6 GHz a single through-hole via is usually tolerable; at 28 GHz the same via can cost 1 dB or more.
Back-drilling removes the unused barrel portion below the signal layer by drilling it out with a slightly larger bit, leaving a small stub remainder. It is the standard remedy for 10 Gbps-plus digital and for RF carriers above roughly 10 GHz where layer management alone cannot eliminate the stub. The trade is cost: back-drilling adds a drilling pass, registration requirements and inspection steps. Designs that specify it should state the maximum allowable residual stub — 6 to 8 mils is a common limit — so the fabricator can verify it by X-ray section.
Aspect ratio is the first yield lever: keeping depth-to-diameter below about 8:1 for mechanical drilling and lower for high-reliability work ensures the plating bath reaches the barrel bottom without voids. Annular ring, antipad sizing and the placement discipline for stitching vias all follow from the same goal — a platable, inspectable hole. The full process context, from drilling through plating to final test, appears in our process-chain overview. Designs that respect these limits move through fabrication without the drill-and-plug rework that quietly adds a week.
Placing a via inside a component pad saves escape routing space on dense BGAs but demands filling and capping: the barrel is filled with conductive or non-conductive epoxy, then capped and planarized with copper so the pad sits flat for soldering. Skip the fill and the solder wicks down the barrel, creating open joints that look exactly like assembly defects. The filling decision belongs in the stackup conversation early, because it changes the multilayer fabrication sequence and the quotation, not just the layout.
Frequently Asked Questions
When a signal above roughly 10 GHz must transition layers on a board thicker than about 4 layers and blind or buried stacking cannot eliminate the stub. Back-drilling removes the resonant barrel section that would otherwise notch the response.
Below about 8:1 for standard production and lower for high-reliability builds. Higher ratios risk plating voids at the barrel center, which appear later as intermittent failures.
Electrically no, thermally yes. Thermal via arrays under hot components are sized by aggregate cross-section, and filling them with conductive epoxy improves heat transfer into inner planes.
Laser-drilled microvias down to roughly 75-100 microns are routine in HDI production, typically stacked or staggered one to two layers at a time with reliable yields.
Send your stackup and via map and we will review stub lengths, aspect ratios and fill decisions against our fabrication window before you release Gerbers.
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