Current capacity, impedance, voltage drop and yield all hang on one dimension. How trace width is chosen, and the numbers worth starting from.
In PCB manufacturing, trace width is the physical width of a copper conductor on the board. It looks like a geometry decision and behaves like an electrical one: the same dimension sets current capacity, thermal behaviour, characteristic impedance, voltage drop and, indirectly, what the board costs to build. A design that gets trace width wrong will pass every schematic review and still fail on the bench. The wider design process it belongs to is described in our stack-up design guide.
Trace width is proportional to the conductor cross-sectional area, which sets its safe current-carrying capacity. Wider traces carry more current and reduce both overheating and resistive voltage loss. Sizing should follow the IPC-2152 approach rather than a rule of thumb carried over from an older design — the same calculation that underpins the overload limits discussed in our overload in PCB manufacturing article.
In high-frequency and high-speed circuits, trace width is a primary determinant of characteristic impedance. Matching impedance to the driver and the load requires the dielectric thickness and permittivity to be considered alongside the width, and typical control accuracy reaches within ±10%. The full procedure is set out in our impedance control steps for high-frequency PCB manufacturing.
Wider traces present more copper surface to the surrounding material and to the air, so they dissipate heat more effectively and lower the operating temperature of the net. This matters most on power circuits and high-voltage designs, where the trace is part of the thermal path rather than only a conductor.
Appropriate trace widths reduce attenuation and reflection, and they help control crosstalk and radiated emissions by keeping coupling predictable. Differential pairs are the strictest case: the two traces have to hold their width and spacing along the entire route, or the matching that the design depends on disappears.
Narrow traces have higher resistance, and at high current that resistance shows up as a voltage drop between the regulator and the load. Optimising width keeps the power delivery network inside specification, which is critical for low-voltage, high-current rails where a few tens of millivolts decide whether a device operates at all.
Trace width has to be matched to what the fabricator can actually hold. Ultra-fine widths need specialised processes and tighter process control, which shows up directly in cost and yield. Where the multilayer construction uses thin dielectric layers, the achievable width and the achievable impedance go together.
Behind the six technical aspects sits a shorter list of outcomes that matter to the product:
These figures are a starting point for calculation, not a substitute for it. Confirm the fabricator’s minimum width and spacing capability before the layout is drawn, because discovering the limit afterwards means a redesign.
| Item | Typical guidance |
|---|---|
| Power lines, inner layers | ≥ 0.3 mm per 1 A |
| Power lines, outer layers | ≥ 0.4 mm per 1 A |
| Conventional signal traces | 0.1–0.25 mm |
| High-frequency signal traces | Require full electromagnetic field simulation before release |
| Minimum width and spacing | Confirm the fabricator's capability in advance |
Trace width sits at the centre of PCB engineering because it is where electrical intent meets manufacturing reality. Getting it right means calculating rather than copying, verifying the result in simulation for high-frequency nets, and checking the answer against what the fabricator can produce. A systematic design–simulate–validate sequence is what produces the balance between performance, reliability and cost that the finished product is judged on.
Frequently asked questions about trace width.
It is the physical width of a copper conductor on the board. Because it sets the conductor's cross-sectional area, it determines current capacity, resistance, thermal behaviour and characteristic impedance.
By calculation rather than rule of thumb. Inner-layer power traces are commonly sized at 0.3 mm per amp and outer-layer traces at 0.4 mm per amp as a starting point, following the IPC-2152 approach and then checked against voltage-drop limits.
It is a primary determinant of characteristic impedance. If width varies, impedance varies, and the mismatch produces reflection, attenuation and radiated emissions — which is why typical control targets sit within ±10%.
Yes, and most do. Partitioned design strategies let power, high-frequency and general signal nets each use their own width class, which is what makes dense HDI layouts practical.
Their minimum achievable width and spacing, and any cost step between width classes. Ultra-fine geometries need specialised processes, so knowing the limit before layout avoids a redesign later.
Send us the net list, current requirements and impedance targets. We will confirm achievable widths against the stack-up and flag any net that needs a wider class before the layout goes to fab.
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