High-frequency materials and their special processing impose wiring rules that ordinary digital layouts can ignore. Follow them and the board behaves like the simulation; skip them and interference, reflection and crosstalk appear exactly where the physics says they will. The impedance targets behind these rules are set in the
controlled impedance design guide.
Isolate Digital and Analog Grounds
When analog ground, digital ground and other ground nets meet at a common point, join them through high-frequency ferrite beads or direct isolation with a single-point interconnect. High-frequency digital ground potentials are inconsistent and rich in harmonics; connect the two grounds directly and those harmonics couple straight into analog signals through the shared copper. Isolate first, connect at one point.
Rule 1: Match Impedance and Keep It Continuous
Impedance mismatch during transmission causes reflections that distort signals and produce fluctuations near logic thresholds. Match the load impedance to the transmission line’s characteristic impedance, and avoid abrupt bends or width changes that break impedance continuity along the path.
High-Speed Interface Routing Rules
The common interfaces carry their own geometry targets — these numbers are the working baseline:
- USB: differential pairs, 10 mil trace width, 6 mil spacing; keep ground at least 6 mil from signal lines.
- HDMI: differential pairs, 10 mil width, 6 mil spacing; more than 20 mil between adjacent differential pairs.
- LVDS: differential pairs, 7 mil width, 6 mil spacing, controlling impedance at 100 Ω ±15%.
- DDR1: avoid vias where possible; keep width and spacing uniform and follow the 2W rule to cut crosstalk.
- DDR2 and beyond: equalize trace lengths on high-speed data lines to maintain matching.
How these widths and spacings translate into impedance is worked through in the trace width and spacing guide.
Rule 2: Protect Signal Integrity
Beyond matching, integrity fails quietly through the ground system. Prevent ground bounce caused by improper ground plane splitting — a split plane under a high-speed path is an impedance discontinuity the designer drew in by hand.
Rule 3: Control Crosstalk Between Parallel Traces
Crosstalk — unintended coupling between adjacent traces — depends on stack-up, spacing, driver and receiver characteristics and termination. The standard countermeasures:
- Insert a ground plane or ground trace between high-risk parallel runs.
- Keep a solid ground layer beneath parallel traces to absorb interference.
- Increase spacing and shorten parallel run lengths.
- Route clock lines perpendicular to critical signals, never parallel.
- Run adjacent-layer traces orthogonally at 90°.
Clock Lines and Floating Pins
Clock signals deserve special handling because their fast edges radiate: surround them with ground traces and ground vias to cut parasitic capacitance, or move them to low-voltage differential signaling with ground shielding. And do not leave unused input pins floating — terminate them to ground or power. A floating pin acts as an antenna and measurably raises EMI; the same discipline shows up in the
high-speed vs high-frequency technology divide, where digital edge rates create RF problems.
