Three hard requirements the AI industry places on high-frequency PCB manufacturing — low-loss stable materials, micron-level precision, and co-design from the first layout — and the specifications each one forces.
Artificial intelligence has become a hardware problem as much as a software one. Large language models, autonomous driving stacks and recommendation engines all run on the same underlying requirement: move enormous volumes of data between processors as fast as possible while spending as little energy as possible. That requirement lands squarely on the printed circuit board. The AI industry’s appetite for bandwidth, channel density and component density has pushed high-frequency PCB manufacturing past specifications that were considered generous only a few years ago, and the gap between what is asked for and what conventional processes deliver keeps widening.
The table below summarises where the pressure appears and what it forces onto the board. The sections that follow take each of the three hard requirements in turn.
| What the AI System Requires | What the PCB Has to Deliver |
|---|---|
| SerDes links at 112 Gbps today, moving toward 224 Gbps | Very low dissipation factor, low-profile or reverse-treated copper foil |
| Bandwidth that must not drift with temperature or frequency | Stable dielectric constant with tight uniformity across the panel |
| Clean signal eyes at multi-gigabit rates | Impedance tolerance of ±5% or tighter on trace width, spacing and dielectric thickness |
| Billions of transistors per package, thousands of pins | Microvias down to 50 µm with uniform copper plating, and high layer counts |
| Processors consuming hundreds of watts | High-thermal-conductivity substrates, thick copper power planes and metal cores where needed |
| Wideband operation free of spurious resonances | Back-drilling of unused via stubs as a standard step |
| Assembly yield and long field life | Flat finishes such as ENIG or immersion silver instead of HASL |
Inside an AI server or switch, the links between GPUs, CPUs and network interfaces now run at 112 Gbps as a matter of routine, and the industry is already designing for 224 Gbps. At those rates the substrate stops being a passive carrier and becomes an active source of loss, which is why standard FR-4 is no longer a candidate. The material has to bring two qualities at once, and the second is often the one that causes trouble.
What matters first is attenuation. Specialised substrates from suppliers such as Rogers, Panasonic and Taconic reduce the energy lost per unit length and the propagation delay that goes with it, so data can travel a longer distance across the board before it needs to be re-timed. The same discussion runs through our notes on laminates chosen for AI servers and high-speed switches, where the electrical grade of the material is the first selection filter.
It is not enough for the dielectric constant to be low; it has to hold the same value as frequency and temperature change. That stability is what keeps impedance consistent and stops the waveform from changing shape along the line, and small inconsistencies translate directly into a steep rise in data errors. The distinction between signal speed and signal frequency becomes important here, and it is unpacked in our comparison of high-speed and high-frequency PCB technology.
At high frequency the current concentrates near the surface of the conductor, so a rough foil adds loss and distortion that no material datasheet improvement can recover. AI-grade boards therefore specify very low-profile or reverse-treated copper, using the smooth side to carry the signal. Read alongside Df, this is the second half of the loss budget.
Good material is only the foundation. Turning it into a working component means holding dimensions that are measured in microns, and three process steps decide whether the electrical promise survives fabrication.
A perfectly fabricated board does not guarantee a working system. The third requirement is organisational rather than technical, and it is the one most often underestimated.
The list above reads like a specification sheet, and that is the point. Meeting it requires a shop that can hold tolerances at the edges of its process window, qualify laminates properly, drill and plate microvias consistently, and provide the measured data to prove it. The suppliers who can do all of that occupy the top of the electronics manufacturing hierarchy, because the physical limits of the hardware put a ceiling on what the software above it can achieve.
Frequently Asked Questions
Its loss is simply too high for links running at 112 Gbps and above, and its dielectric constant moves with frequency and temperature. Both effects corrupt the signal before any layout technique can help, so the material is ruled out at the selection stage.
No. The dielectric constant also has to be stable, and the copper foil has to be smooth. Loss that comes from a rough conductor surface is invisible in the laminate datasheet but shows up directly in measured insertion loss.
Because at multi-gigabit rates a discontinuity reflects part of the signal back into the line, and the reflected energy corrupts the data that follows. Keeping trace width, spacing and dielectric thickness within ±5% is what holds the reflections small enough to ignore.
It removes the unused copper stub left by a through-hole via. That stub acts as an antenna at particular frequencies and resonates, degrading the channel. Removing it is now a routine step in boards for high-performance computing and networking.
Because thermal paths, surface finish and DFM decisions are all settled before fabrication. If the fabricator is brought in late, those decisions are made on assumptions rather than on capability, and the cost appears as additional board spins.
Send us your data rates, stack-up and impedance tolerance and we will confirm which laminate and which process window your design needs before you release it.
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